Concurrent and Mutually Dependent Scheduling and Placement

by
Jason Thorsness

Over the last few years, reconfigurable computing platforms have enjoyed greater utilization in real-world applications as they have become cheap and fast enough to rival ASICs in many implementations. Programming these platforms, which involves hardware design, continues to be a difficult problem that limits wider adoption. We are trying to solve this problem in part by combining scheduling, used by software compilers, with placement and routing, which are part of hardware design tools. Exactly how to combine these schedule, placement and routing tools has been the focus of our research.

The goal of this research was to investigate the performance of new SPR tools for coarse-grained programmable architectures (architectures in which the functional units are in the class of adders and multipliers rather than logic gates such as in FPGAs). A new simulated-annealing based algorithm was developed that combines scheduling and placement into a single step to increase the quality of the produced placement. In this talk I will describe the operation of this algorithm and discuss its performance as part of the whole SPR chain.

Advised by Carl Ebeling

CSE 403
Wednesday
March 1, 2006
3:30 - 4:20 pm