Table of Contents
Clock Distribution
Problem: On-chip Clock Delay
Phase-Locked Loops (PLL)
Generating On-Chip Clocks
Delay-Locked Loop (DLL)
Using A DLL for Clock Synchronization
Systems-on-a-Chip
System Clock Distribution
Distributed Clock Generation
System Trends
Trends
Trends
Trends
Trends
Physical System Design: Chips and Packages
Chip Types
Ball-Grid Array
BGA Package
Flip Chip
Printed Circuit Boards
Mounting Chips on PCBs
Printed Circuit Boards
Flexible PC Boards
MCMs - Multi-Chip Modules
|
Author: Carl Ebeling
Email: 477-webmaster@cs.washington.edu
Home Page: http://www.cs.washington.edu//education/courses/477/CurrentQtr
|