Project Specifications | ||
| Parameter | Value | Calculations & Reasoning |
| FPGA Clock Freq. | 24MHz | External 24MHz clock. |
| CODEC Sample Rate | 23.4375kHz | 24MHz / (4 * 128 cycles per sample * 2 stereo chanels) |
| Upper Freq. Limit | 6KHz | Based on typical musical instrument range. |
| Lower Freq. Limit | 100Hz | Based on the typical limit of loudspeaker low freqency reproduction. |
| RAM Required | none | Pitch extraction uses a real-time algorithm; storing large amounts of data is unnecessary. |
| Latency | negligible | Pitch extraction uses a real-time algorithm. |