CSE 471: Computer Design and Organization

Help / How to use Verilog on CSE Machines

You can use the Unix machines ozette, calvin, hobbes or tolt to run your verilog programs. You can use the PCs in rooms 232 and 231 or the Xterms in room 329 to log into these machines.

On the PCs do the following:

Login by pressing
Start "X-Win32" server (X Window server) by clicking Start/Programs/X-Win32/X-Win32. You should see an icon "X-Win32" on the task bar after this.
Telnet into one of the above machines and set the display variable. In C Shell (csh) or tcsh you can do this by typing
setenv DISPLAY machine:0.0 In ksh or bash you can set it by typing
export DISPLAY=machine:0.0 where machine is the name of the PC you are working on. (It is pasted on to of every PC in the labs)
Add the following two lines into your .cshrc file (in the home directory)
setenv UW_VLSI_TOOLS /var/mnt/vlsi/vlsi-3.2 source $UW_VLSI_TOOLS/setups/cadence97A.cshrc setenv CDS_LIC_FILE $CDS_INST_DIR/share/license/license.dat This has to be done only once.
Now you can start compiling programs. To compile file1.v and file2.v type
verilog file1.v file2.v

To make use of the advanced features of the verilog GUI and simulator, you have to start verilog as follows:

verilog +gui -s file1.v file2.v The +gui flag starts up the GUI environment. The -s flag stops the simulation at the first time step. Then you can use the various debugger like features to debug your verilog code. One feature which I find very useful is the Waveform Viewer. It generates waveforms over time, for the various signals in your verilog program. To use the waveform viewer, do the following:

After the GUI starts up go to the "Tools/Navigator". Right click on any signal or module name you like to view. Select wavetrace. The SimWave viewer starts up labeled with the signal you selected. You can add more signals or modules from the navigator.
Start the simulation by clicking on the "Play button" or by selecting Control/Run. After the simulation finishes, you will see the waveform. You can also set breakpoints etc. in your verilog program.

It is a good idea to restart the verilog environment each time you make some changes to your verilog files.

Note for old users: The version of verilog available is a newer one which quite a few changes. It is also much more stable and the older version.

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