Branch prediction tables and buffers

• Branch prediction table (or branch history table)

  • How addressed (low-order bits of PC, hashing, cache-like)
  • How much history in the prediction (1-bit, 2-bits, n-bits)
  • Where is it stored (in a separate table, associated with the I-cache)

• Branch table buffers

  • BPT + address of target instruction
  • BPT + address of target instruction + target instruction (not implemented in current micros as far as I know)

• Correlated branch prediction

  • 2-level prediction

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