1-bit Adder with Overflow

module fullAdd1( CarryOut, Result,Overflow, a, b, c);

input a, b, c;

output CarryOut, Result, Overflow;

reg CarryOut, Result,Overflow;

always @(a or b or c)

begin

{CarryOut, Result} = a + b + c;

Overflow = c ^ CarryOut;

end

endmodule

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