Illinois protocol: design decisions
The Valid-exclusive state is there to enhance performance
- On a write to a block in V-e state, no need to send an invalidation message (occurs often for private variables).
On a read miss with no cache having the block in dirty state
- Who sends the data memory or cache (if any)? Answer cache
- If more than one cache, which one? Answer the first to grab the bus (tri-state devices)