Table of Contents
Multiprocessors - Flynn’s taxonomy (1966)
MIMD: Shared-memory vs. message-passing
Shared-memory vs. message-passing
Caveat about parallel processing
Multis: single shared-bus systems
Cache coherence (controllers snoop on bus transactions)
Cache coherence (cont’d)
Write-update
Write-invalidate
Snoopy cache coherence protocols
State transitions for a given cache block
An example of write-invalidate protocol: the Illinois protocol
Illinois protocol: design decisions
Illinois protocol: state diagram
An example of sophisticated write-update protocol
Dragon protocol (writes are updates)
Performance of snoopy protocols
What about cache hierarchies?
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Author: cselab
Email: baer@cs
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