Bringing associativity to a direct-mapped cache -- Victim cache
Goal remove some of the conflict misses in L1direct-mapped caches
- Small fully-associative buffer “behind” the L1 cache and “before” the L2 cache
- Hit in L1, do nothing
- Miss in L1 for block b, hit in victim v (takes an extra cycle) -> swap b and v
- Miss in L1, miss in victim -> if victim is full, evict an entry and put b at its place
- Victim buffer of 4 to 8 entries for a 32KB direct-mapped cache works well.