Back to associativity

• “Old” conventional wisdom

  • Direct-mapped caches are faster; cache access is bottleneck for on-chip L1; make L1 caches direct mapped
  • For on-board (L2) caches, direct-mapped are 10% faster.

• “New” conventional wisdom

  • Can make 2-way set-associative caches fast enough for L1. Allows larger caches to be addressed only with page offset bits (see later)
  • Looks like time-wise it does not make much difference for L2/L3 caches, hence provide more associativity

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