Example of analysis
Choice between 32B (miss rate m32) and 64B block sizes (m64)
Time of a miss:
- send request + access time + transfer time
- send request independent of block size (e.g.,2 cycles)
- access time can be considered independent of block size (memory interleaving) (e.g., 28 cycles)
- transfer time depends on bus width. For a bus width of say 64 bits transfer time is twice as much for 64B (say 8 cycles) than for 32B (4 cycles).
32B is better if 34 m32 < 38 m64