Obvious solutions to decrease miss rate
Increase cache capacity
- Yes, but the larger, the slower
- Limitations for first-level (L1) on-chip caches
- Cache hierarchies
Increase cache associativity
- Yes, but “law of diminishing returns” (after 4-way?)
- More comparisons needed, i.e., more logic and therefore longer?
- Make cache look more associative than it really is (see later)