Unit latencies
Pipelines might have an EXE stage that takes multiple cycles , for example
- EXE integer: latency 0 (pipelined)
- FP adder: latency 3 (pipelined)
- FP (and integer multiply) latency 6 (pipelined)
- FP divide (and integer divide) latency 25 (not pipelined)
Result of instruction I can be forwarded to instruction I + 1 + latency