Week1, Lecture2: Combinational logic
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Table of Contents
Combinational logic
Binary numbers
Twos complement arithmetic
Overflow
Combinational vs sequential digital circuits
Combinational versus sequential
Logic functions and truth tables
Logic functions and truth tables (con’t)
Mapping Boolean expressions to logic gates
Two-level canonical forms
Sum-of-products canonical form
Product-of-sums canonical form
de Morgan’s theorem
Two-level logic using NAND and NOR gates
Conversion between forms: SOP
Conversion between forms: POS
Logic minimization and Karnaugh maps
K-map cell numbering
K-map adjacencies
K-map minimization: 2 and 3 variables
K-map minimization: Complements
K-map minimization: 4-variables
Incompletely specified functions
Truth table for a BCD-increment function
K-maps and don't cares
Solving simple combinational problems
Design example: BCD increment by 1
BCD increment by 1 (con’t)
BCD increment by 1 (con’t)
Author:
Chris Diorio
Email:
diorio@cs.washington.edu
Home Page:
http://www.cs.washington.edu/education/courses/467/99au/