UW CSE
Autumn 1999
CSE467: Advanced Digital Systems Design
Instructor: C. Diorio

Final Project
DUE: On or before 5:00 p.m. on Dec 10,1999

Collaboration Policy:
This is a group project: Your lab group must turn in a written solution, and demonstrate (and explain) your working state machine to the instructor. Your group may collaborate with other CSE467 groups on the project. Collaboration means that you may discuss the problem and make notes during the discussion, but you may not copy another group’s design; you may not copy results from another group; and you may not copy any part of another group’s writeup. In addition, every individual in your group must understand the design, must participate in the writeup, and must understand the results. Collaboration does not mean that one person may design the state machine and another do the writeup—all lab partners must share equally in all parts of the project.

Late Policy:
This assignment is due on or before 5:00 pm on 12/10/99. In addition, you must meet with me for 30 minutes, on either December 9 or 10, to demonstrate your working state machine. I will post a signup sheet outside my office (410 Sieg) for you to select a meeting time. I will ask to see your design and simulations, and I will ask you questions about your circuit. I will also give you a 16-bit key and a 16-bit data word, and ask you to encrypt the data word. I cannot accept late projects—you must demonstrate your state machine at your chosen meeting time.

Overview:
The purpose of this assignment is to demonstrate that you can design and test a complete digital hardware system. This project is worth a total of 200 points.

What You Must Do:
Design and implement a DES encryptor on the Xilinx XESS board. We will assign your project a grade based on your lab presentation, your writeup, your design (circuit/code/FSM details), your analysis and simulation results, and your use of good design practices. The lab presentation will comprise 2 parts: (1) you will explain how your circuit works, and (2) we will give you a 16-bit key and a 16-bit data word, and ask you to encrypt the data word.

What You Must Turn In:
In addition to your lab demonstration, you must hand in a complete written description of your project, including:

(1) A detailed explanation of what you did and how your circuit works.
(2) Handwritten state and dataflow diagrams.
(2) Complete Xilinx schematics, state assignments, and Verilog code.
(3) Simulation results demonstrating proper operation (including critical-path timing, if appropriate).
(4) Anything else that you need to document your design.
Your solutions must be legible.

The Assignment:
Design and implement a 16-bit DES encryptor on the Xilinx XESS board. You can find a nice tutorial on the DES algorithm at http://www.zolatimes.com/V2.28/DES.htm. You can find the class slides that are based on this tutorial at http://www.cs.washington.edu/education/courses/467/99au/admin/Slides/Week6Lecture1/index.htm.

Here’s how your DES system should work: The user will input two binary words at the keyboard: The first is a 16-bit key; the second is the 16-bit data to be encrypted. The user will then press a "start" button on the XESS protoboard. The DES FSM will encrypt the 16-bit word, then display the encrypted result on the LCD display. The user should then have the option of pressing another button on the protoboard, that cycles through intermediate results (the outputs of each "round"). Each time the user presses the second button, he/she should see the results from the next round (in sequence) on the LCD display. Once he/she gets to round 16, the counter should loop back to round 1.

Some notes on your DES implementation. Refer to the lecture slides.

1) Your implementation will use a 16-bit key. You should generate all 16 permutations of this key in software (on the PC), and download the 16 permuted keys to the SRAM on the XESS board. There are two parity bits in your input key (bits 8 and 16). You do not need to check if the parity is correct. Your permuted keys will each be 12 bits wide.

2) The initial key permutation table (corresponding to slide 9 in the lecture) is:
            9     1     10     2     11     3     15
            7     14     6     13     5     12     4

3) Use the same shift table to generate your permuted subkeys as in the original DES algorithm (i.e. use the shifts shown in slide 11). Note that some of your 16 subkeys will be identical.

4) The final key permutation table (corresponding to slide 12 in the lecture) is:
            14     11     1     5     3     6
            10     12     4     8     7     13

5) Your message is 16 bits in width. The left half of the message is 8 bits wide, and the right half is 8 bits wide. Skip the initial-permutation step in the DES algorithm (i.e. skip slide 13).

6) The right-side data expansion will expand your 8-bit byte to 12 bits. The expansion table (corresponding to slide 16 in the lecture) is:
            1    2     3     4     5     4
            5    6     7     8     8     1

7) Group your 12-bit data as 4 blocks of 3-bits each. Each 3-bit block is an index into an S-box. The first and last bits form a column address, and the middle bit forms a row address. Each S-box entry gives a 2-bit result. There are 4 S-boxes:
            S1:     1     2     3     0
                      0     2     1     3

    S2:     1     3     2     0
            3     2     0     1     S3:     0     3     1     2
            0     3     2     1     S4:     3     0     1     2
            0     3     2     1 8) The p-box permutation table (corresponding to slide 20 in the lecture) is:     7     1     5     2
    8     3     6     4 9) Skip the final permutation in the DES algorithm (i.e. skip the permutation step on slide 23), but do reverse the order of the last 2 bytes to generate your final encrypted output (i.e. form the 16-bit word R8L8 as on slide 23).

10) You must write code to accept user input from the keyboard (data and key), generate the 16 subkeys, and download the whole thing to the XESS board. I suggest that you write the data and subkeys to a file, and download the file using XSRAM.

11) Your state machine should execute the entire DES algorithm when the user presses the "start" button on the XESS board, and immediately display the encrypted result on the LCD display. This means that you should store intermediate results (from each round) to RAM while the algorithm is executing, so that you can later cycle through these results.

12) The data and key we input at the keyboard should be in a binary format (i.e. strings of 1s and 0s). The results you display on the LCD display should also be binary (example: 1100110000110011).
 
13) Your keyboard input should be formatted MSB first and LSB last. This means, for example, that to input the data word 1000000000000000, you should type the "1" first. Depending on how your code writes the keyboard input to a file, you may need to invert the bit order before you download the key and data to the SRAM. Just to be clear on this, if you split the above data word into a left and a right side (see comment 5 above), the left side is 10000000, and the right side is 00000000.