|====================================================================
|======================== Foundation Script Template File ===========
| This is a template file for the Xilinx Foundation Simulation Command
| language. It will provide a basic starting point for customers looking
| for a 'How-to' on command scripts. Scripts have proven
| themselves easier to use for larger simulations.
|
| Written by J.W. Brooks Xilinx FAE, Nashua, NH
|====================================================================
|========================SETUP the Stimulus environment==============
|
|delete any existing waveforms in the window
|
delete_signals
|--------------------------
| Clear the the file sim_out.out for capturing output directed
| to this file later. This file can be used by Multiple commands
| like BREAK and PRINT to output simulation information.
|
clpr sim_out.out
|--------------------------
| Restart to time zero
|
restart
|--------------------------
| Set the simulator mode to functional simulation
| You will probably aready have the mode selected from
| strating up the simulator. But you can start it from here too.
|set_mode functional
|--------------------------
| Setup Vectors
| A 'vector' or 'v' can contain any group of signals, either busses
| and/or descrete signals. You can't mix inputs and outputs in
| the same vector. Defining a vector will add it to the
| waveform viewer automatically. However you need to add
| the signals with the 'watch' command file if you want to write
| it to a file.
|
| Controls:
| vector CONTROL_VEC CLOCK I_CLK_EN I_LOAD I_ADDSUM
| Inputs:
vector INDAT_VEC I_DAT_IN[7:0]
| Outputs:
vector ACCOUT_VEC O_ACC_OUT[7:0]
|--------------------------
| The watch statement designate which signals will be
| observed in the waveform window. Please note: This will
| not add any stimulus to these signals. 'watch' is generally
| used on outputs or internal nodes you would like to see
| in the waveform viewer. Additionally you must select signals
| and vectors with a 'watch' if you want them to be printed
| a file.
|
watch O_C_OUT SimGlobalReset IN OUT
|--------------------------
| assign vectors to display hexadecimal results
| in the waveform viewer
|
radix hex INDAT_VEC
radix hex ACCOUT_VEC
|
|--------------------------
| set the clock step size
stepsize 50.0ns
|
|--------------------------
| The following designates the signal CLOCK to be a clock signal
| of two steps with the rising edge at the second 50ns boundry.
clock CLOCK 0 1
|
|--------------------------
| 'assign' the input signals to a initial value.
| This also declares them to be displayed in the waveform viewer.
| Again the 'watch' command is required to print the signals to
| a file.
|
assign I_LOAD 0
assign I_ADDSUM 1
assign I_CLK_EN 0
assign GSR 0
assign I_CE 0
assign I_OE 1
assign B_IO 1
|
| There are several ways to drive an input bus.
|
| Method 1: use the assign statement to directly drive a value
| for the initial state and add other 'assign' statements later
| to change this inital value
| assign INDAT_VEC 01\H
|
| Method 2: Use the 'wfm' command and add listing of the stimulus values
| for the bus over time through the simulation. Please note the simulator
| will preserve the last valus on the bus if no further 'assign' are
| made.
|
wfm INDAT_VEC @0ns=01\H +
@300ns=02\H +
@600ns=05\H +
@900ns=10\H
|
| Method 3: Re direct the stimulus for the BUS from a file using the
| 'wfm' command. 'stim.dat' should look like:
|-------start stim.dat (not including this line)--------
| @0ns=01\H +
| @300ns=02\H +
| @600ns=05\H +
| @900ns=10\H
|-------end stim.dat (not including this line)--------
|
| wfm INDAT_VEC < stim.dat
|
|------- 'break' command ---------------------------------
| Please consult users guide or on-line help. This command is
| a powerful way to monitor you simulation and insert stimulus
| if a certain event occurs:
| Examples:
|
| break - deletes (turns off) all breakpoints
| break clock - deletes all breakpoints on clock signal
|
| break clock ? - stops simulation after any clock transition
|
| break enable Z-X - stops simulation when the enable signal changes
| from High_Z to Unknown_X
|
| break clock 0-1 do (assign < DATAfile.dat; print) - stops simulation
| when the clock transitions from low to High and then assigns signal
| DATA a new value from file.dat. Next, it prints the new state of all
| signals.
|
|=================Start of the simulation stimulus=====================
| Logical states are represented by names (HIGH, LOW, etc.) and by numbers
| (0,1). Bus logical states are described by a list or an array of names
| or numbers. The left-most names or numbers represent the highest bus
| signal values. If you specify fewer bus names than allowed, macro will
| automatically fill in 0s or Lows for the higher order bus lines. A
| single signal line is treated as a bus with a single line.
|
| Buses can be expressed in Binary (\B), Octal (\O), Decimal (\D) and
| Hexadecimal (\H) format. If no format is specified, it is assumed to be
| a binary. These formats may also be expressed using their numerical
| bases, e.g. \2, \8, \16, \20.
|
| Examples of bus values:
|
| 11100010101 binary bus representation
| 100010101\B binary bus representation
| 1234\8 octal bus representation
| 777\O octal bus representation
| eff3ab\16 hexadecimal bus representation
| 10010101\H hexadecimal bus representation
| 99999\D decimal bus representation
| abcdefg\20 base 20 numbering system
|------------------------------------------------------------------
| 'print' file_name.dat prints out the results of the
| signals in the listed in the 'watch' command. 'print'
| will capture the data only for the specific time
| it is called. To print multiple times you need to
| use the print command multiple times. It appends
| to the file_name used.
print sim_out.out
|------------------------------------------------------------------
|
| 'high' or 'h' and 'low' or 'l' are used to set the
| high or low logical level of individual signals.
| 'x' can be used to set a signal to unknown.
|
| Toggle the SimGlobalReset and PRLD(XC9500 only) to be sure the
| design is initialized
|
h SimGlobalReset
h PRLD
cycle 3
print sim_out.out
l SimGlobalReset
l PRLD
cycle
print sim_out.out
|--------------------------
| The 'cycle n' command will simulate for 'n' clock cycles
| The 'sim xx.xxns' will simulate for a specific amount of time.
| The 'run n' will simulate for 'n' clock cycles
sim 100.0ns
| 'h' or 'high' sets the signal to a logical '1'
h I_CLK_EN
print sim_out.out
sim 300.0ns
|assign INDAT_VEC 02\H
sim 100ns
h I_CE
print sim_out.out
cycle
| 'l' or 'low' sets the signal to a logical '0'
l I_CE
l B_IO
cycle
print sim_out.out
l I_OE
|------------------------------------------------------------------
| For bidirectional I/O or busses the 'release' command is quite useful.
| 'r' or 'release' releases a signal from stimulator control.
| Tt is used to view the values of a bi-directional bus or signal
| when it is being driven by the chip. You can reattach the stimulator
| to the bus or pin by using 'h', 'l', or 'assign'ing a value.
r B_IO
cycle
h I_OE
cycle 2
print sim_out.out
h B_IO
cycle 2
print sim_out.out
|==================================================================
| Other commands to know of....
|------------------------------------------------------------------
| The 'chk_design' command allows the user to compare a previously
| saved simulation to the current one to see if they match.
| Please see the online help of further details on this command.
| chk_design design_name
| chk_design c:\Perv_design\design_name
| chkds design_name
| Along the same lines is the 'chk_results' command. This command
| compaires the results of the output files form the simulator for
| two designs. Please see the on-line help for more details.
| chk_results reference_file1 reference_file2 compsn_results_file
| chk_results reference_file1 reference_file2
|
|------------------------------------------------------------------
| The 'delete_signals' or 'dels' command will remove siganls from
| the waveform viewer.
|
|------------------------------------------------------------------
| 'execute' or 'ex' will run another command file.
| This can allow the user to nest command files easily.
| The syntax is:
| ex file_name.cmd
|
|------------------------------------------------------------------
| 'network' or 'net' allow you to load another netlist into the
| simulator
| net fifo_des
|------------------------------------------------------------------
| You can use Macros to repeat a simulation function
|
| Example:
|(assign A