# Sample User Constraint File (UCF) # ================================= # # Both the "#" sign and "//" (double slash) are used as comments in the # UCF file. The convention used here is that "#" is used for descriptions, # and "//" is used to comment out examples which you may un-comment to use. # # This file contains mostly signals/pins that must be mapped to specific # locations due to the way the Xess boards are laid out. You may also add # your own constraints in order to access other signals externally. # # Please note that since the implementation tools are case sensitive, the # case that you use for net names in this file MUST match those that are # used in creating your design! # # See Xilinx on-line help for more detailed descriptions of these and other # constraints. # -------------------------------------------------------------------------- # ------------------------- USER-SPECIFIED PINS ---------------------------- # -------------------------------------------------------------------------- # -------------------------------------------------------------------------- # ------------------------ XESS-CONSTRAINED PINS --------------------------- # -------------------------------------------------------------------------- # ===== CLOCK FROM EXTERNAL OSCILLATOR ===== //NET CLK LOC=P13; # ===== LED DRIVER OUTPUTS ===== //NET LED<0> LOC=P25; //NET LED<1> LOC=P26; //NET LED<2> LOC=P24; //NET LED<3> LOC=P20; //NET LED<4> LOC=P23; //NET LED<5> LOC=P18; //NET LED<6> LOC=P19; //NET LED<7> LOC=P30; # THERE IS NO CONNECTION TO THE DECIMAL-POINT # ===== DATA BITS FROM THE PC (VIA PARALLEL PORT) ===== //NET PC_D0 LOC=P44; //NET PC_D1 LOC=P45; //NET PC_D2 LOC=P46; //NET PC_D3 LOC=P47; //NET PC_D4 LOC=P48; //NET PC_D5 LOC=P49; //NET PC_D6 LOC=P32; # MUST USE SPECIAL-PURPOSE PINS FOR //NET PC_D7 LOC=P34; # ACCESSING PC_D<6> AND PC_D<7> # ===== DATA BITS TO THE PC (VIA PARALLEL PORT) ====== //NET PAR<0> LOC=P70; //NET PAR<1> LOC=P77; //NET PAR<2> LOC=P66; //NET PAR<3> LOC=P69; # ===== RAM PINS ===== //NET OE_ LOC=P61; # ACTIVE-LOW OUTPUT ENABLE //NET CE_ LOC=P65; # ACTIVE-LOW CHIP ENABLE //NET WE_ LOC=P62; # ACTIVE-LOW WRITE ENABLE //NET RA<0> LOC=P78; # RAM'S ADDRESS PINS //NET RA<1> LOC=P79; //NET RA<2> LOC=P82; //NET RA<3> LOC=P84; //NET RA<4> LOC=P3; //NET RA<5> LOC=P5; //NET RA<6> LOC=P60; //NET RA<7> LOC=P56; //NET RA<8> LOC=P58; //NET RA<9> LOC=P59; //NET RA<10> LOC=P83; //NET RA<11> LOC=P4; //NET RA<12> LOC=P50; //NET RA<13> LOC=P57; //NET RA<14> LOC=P51; //NET RD<0> LOC=P10; # RAM'S DATA PINS //NET RD<1> LOC=P80; //NET RD<2> LOC=P81; //NET RD<3> LOC=P41; //NET RD<4> LOC=P40; //NET RD<5> LOC=P39; //NET RD<6> LOC=P38; //NET RD<7> LOC=P35; # ===== MICROCONTROLLER PINS ===== //NET XTAL1 LOC=P37; # INPUT CLOCK //NET RST LOC=P36; # ACTIVE-HIGH RESET