PPT Slide
Actel FPGA basic cell (examples)
Configurations inputs: signal, 0, 1, tie-together # of inputs # of fns max 1 4 4 2 16 16 3 223 256 4 most 65,536 5 some 2^32 6 several 2^64 7 few 2^128 8 1 2^256
note that not all inputs are available in both polarities – must carefully assign phase
examples: 4-input mux: two selects S0A=S0B, S0=S1 four inputs D0, D1, D2, D3 2-input XOR: two inputs S0A, S0B D0=S0B, D2=S0=S0A, D1=D3=S1=0