CSE467 Workload, Grading, and Policies


Catalog Data: CSE467: Advanced Digital Design (4).
Advanced techniques in the design of digital systems. Hardware description languages, combinational and sequential logic synthesis and optimization methods, partitioning, mapping to regular structures. Emphasis on reconfigurable logic as an implementation medium. Memory system design. Digital communication including serial/parallel and synchronous/asynchronous methods. Prerequisites: CSE370/352 and CSE326/332.

Course Goals: To provide in-depth understanding of digital systems and their design, from specification and simulation to construction and debugging. What you are really learning is how to program fine-grained parallel computation.

Workload

Homework: There will be two kinds of homework:
1) Regular homework sets which you will have about a week to complete
2) Short design problems assigned at the end of some lectures, generally due at the beginning of the next lecture. You will get 10 points for making a good attempt to solve the problem and another 10 points will be given for correct solutions. We will not be able to grade every problem – for these you will get full marks for turning in a solution. No late solutions will be accepted.

Regular homework assignments are due at the beginning of class on the assigned due date. Assignments handed in during or immediately after class will incur a 10% penalty. We will penalize your assignment 10% per day for each additional day late, including weekend days.

Assignment problems may sometimes be graded on a random basis. To get full credit for an assignment, you must, of course, turn-in solutions for each assigned problem. Only a subset of the problems may be graded in detail. You will not know in advance which problems this will be - so make sure to do all of them.

Please review the assignment solutions carefully before questioning a grade with either the instructor or the teaching assistants.

Labs: There is a lab scheduled every week on Tuesday morning. Some of the labs will be self-contained and you will be able to complete it in the three hour lab time. Other labs will require extra time to complete.. Early labs will generally be done alone - later labs and the project will be done in groups of two.

Collaborative Learning: It is well known that students can learn a lot from each other given the chance. I encourage you to work with each other. However, I also expect the work you turn in for homework, labs and the design problems to be your own. That is, even though you may get ideas from other students, you are responsible for understanding it to the point where you can put the design together and get it to work. I also encourage you to help other students. However, although it is fine to discuss ideas or help them debug a design, please do not do their work for them.

Cheating Policy: I expect that the work you turn in is your own. To the extent that you get help, you must credit that help. When you do a joint problem or lab, all names must be on the assignment.

Exams: There will be a mid-term exam. The final exam will be two hours.  The midterm and the final exam will be open notes.

Grading: The course grade will be determined roughly as follows:

I do not grade on the curve. I'd be delighted if everyone got a 4.0


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