// This test fixture tests the run-length encoding module

`timescale 1ns / 1ns

module encoder_tf 
( input clk, reset,
input [7:0] charIn,
output [7:0] charOut,
output reg 	dataValidOut, 
input       dataValidIn  
);

reg [7:0]   fifo_in [2048:0];	
reg [7:0]   fifo_out [2048:0];
integer     head_in, head_out;
integer     i, j, num;
reg [6:0]   char;

initial	begin
		head_in = 0;
		head_out = 0;  
		char = 0;
		for (i = 0; i < 500 ; i = i+1) begin
				char = char + 1;
				num = $random & 3'b111;
				if (num == 3'b000) begin
						fifo_out[head_out] = char;
						fifo_in[head_in] = char;
						head_in = head_in + 1;
						head_out = head_out + 1;
				end else if (num == 3'b001) begin
						fifo_out[head_out] = char;
						fifo_out[head_out + 1] = char;
						fifo_in[head_in] = char;
						fifo_in[head_in + 1] = char;
						head_out = head_out + 2;
						head_in = head_in + 2;
				end else begin
						for (j = 0 ; j < num+1 ; j = j+1) begin	 
								fifo_out[head_out] = char;
								head_out = head_out + 1;
							end	  
						fifo_in[head_in] = char;
						fifo_in[head_in+1] = 255;
						fifo_in[head_in+2] = num-2;
						head_in = head_in + 3;
					end
			end	 
	end

//output to run-length encoder
assign charOut = fifo_out[head_out];
always @(posedge clk) begin
		if (reset) begin
				head_out <= 0;
				dataValidOut <= 0;
		end else begin
				if (($random&3'b111) == 2)
					dataValidOut <= 0;
				else
					dataValidOut <= 1;
				if (dataValidOut) begin
						head_out <= head_out + 1;
					end
			end
	end

// input from run-length encoder
always @(posedge clk) begin
		if (reset) begin
				head_in <= 0;
		end else begin
				if (dataValidIn) begin
					if (charIn === fifo_in[head_in])
							$display("Correct!! Is: %d; Should be: %d", 
								charIn, fifo_in[head_in]);
						else 
							$display("Error!!!! Is: %d; Should be: %d", 
								charIn, fifo_in[head_in]);
						head_in <= head_in + 1;
					end
			end
	end

endmodule