Lab #3: Intro to DSP

1. Add hardware needed to convert the the parallel data back into serial data for the codec. Do this in a separate Verilog module. You can then insert any processing that you want into the parallel stream. Here is the starting point.  There should be two paths through your system:   

•     Serialin to Serialout  (provided)
•     Serialin converted to parallel data, converted back to serialout.
•     Use one of the buttons on the XSV board to select between the two paths for testing purposes
•     Find an input frequency that causes aliasing. Use the function generator test equipment to produce input signals at a variety of frequencies

2. Perform the following computations on a single (mono) channel of the input stream

• Case 1: each output sample is the average of the last two input samples
• Case 2: each output sample is the difference between the last two input samples
• For each case, plot  the amplitude of the output signal as a function of input frequency. Use the function generator test equipment to generate input signals at a variety of frequencies (the sample frequency being the highest input frequency)

Reference:

• The codec data sheet: it will be very helpful for you to look at the timing diagram for Mode-2, which is how the codec is configured on the XSV boards

Due in 1 week