CSE 467 Lab 2
Due on 1/22/01 Beginning of Lab

Purpose

Become competent users of the Xilinx tools, and refresh basic synchronous system design skills. Test your reaction time!

What You Are Given

You can use anything you want from the previous lab assignment.

Functional Specification: Reaction Time Measurement

The device works as of the following.

1. Upon pressing BTN4, a random LED of the 8 possible will come on. We will call this the original LED.

2. After releasing BTN4, the original LED goes off.

3. LEDs will turn on and off at random intervals, until the original LED turns on again. The original LED will remain illuminated until the you push BTN1.

4. The object is to press BTN1 as quickly as you can when the original LED returns (gently please!).

5. The four digit 7-segment display will show the delay between illumination and BTN1 press, in milliseconds. You can use hexadecimal numbers.

6. If you press the button for the wrong LED, the display will show four dashes and stop the process.

7. You can start a new measurement cycle by pressing BTN4.

Notes and Suggestions

· You can use a Linear Feedback Shift Register to generate pseudo-random numbers in hardware. This link has all of the information that you need to design one of these, but I am sure there are many more resources on the web. Let us know if you have questions. We are open to other ideas of ways to get a random numbers.

· Simulation is not a requirement. Use it to the extent that you think it will help you. It will. Too bad about Xilinx’s

· consider using the “logicBlox Module Generator” (under tools in the schematic view) to created datapath elements in your design. This will save you much verilog and/or schematic effort.

· Feel free to create levels of hierarchy to keep your schematics simple and readable. (tools->symbol wizard)

· Think about the effect of “switch bounce”. The fact that as you press the button the input voltage might make transitions between low and hi on its way to its final value. Same on release.

ATTENTION: YOU NEED TO HAVE YOUR WRISTWRAPS ON WHILE MANIPULATING THE BOARD.

Turn in

• Well documented design work. Including:
• Block Diagram showing the major communicating sub-blocks of your design
• Detailed design of each sub diagram. May include state machine diagrams, Verilog source, schematics, etc. Provide enough details so that we can understand your thought process. (use of Verilog is optional).
• Document the minimum cycle time of your circuit and the % utilization of the FPGA resources.
• Note that the Digilab board runs at 25MHz. This will important to get the UI right.
• You must demonstrate your device to Larry or Andrei. You need to show that the measurement is accurate using available test equipment (the scope is probably a good choice).

Miscellaneous

Refer to the previous lab's page for a crash guide on using the tools.