Example: 4-bit binary synchronous counter

(1) Low order 4-bits = 1111

(2) RCO goes high

CLK

• Typical library component

  • positive edge-triggered FFs w/ synchronous load and clear inputs
  • parallel load data from D, C, B, A
  • enable input: assert to enable counting
  • RCO: “ripple-carry out” used for cascading counters
    • high when counter is in its highest state 1111
    • implemented using an AND gate

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