ATmega16 processor. Page 215 doesn't appear in your course pack, but contains the ADC Auto Trigger Source table.
Tasks
Experimenting with the Logic Analyzer
Hook a logic analyzer up to the 7-segment display outputs. Try and capture a sequence of 4 numbers being displayed.
Reading a value from the potentiometer with the ADC
Connect the Potentiometer to ADC0. Ensure that AVCC is correctly connected
Write code to read the ADC0 value and display the 4 MSBs on your hex display. This is for debugging the conversion process. The numbers should change as you turn the pot. Use the oscilloscope to watch the input to ADC0 while you turn the pot.
Next, write code to control the speed of counting (lab 2 code) on your hex display. Your code should periodically sample the ADC, and use the result to set the timer interval to change the count rate from 1/second to 15/second. You code should use the up/down and start/stop buttons, as in Lab 2.
Ramping the counter
We want the count rate of our lab 2 code to start from zero (1 step/second) and slowly ramp
up to maximum (15 steps/second). Stop should slowly ramp down to zero. The ramp time should be approximately 4 seconds.Minimum, Maximum, and Rate should all be set with declared constants so that they can be changed later. Don't wire values into your code. A linear ramp is sufficient.
Reverse should ramp to zero, change the direction, and ramp back up to
maximum. Remember State Machines from CSE370? You need to build a state
machine to control this ramping and start-stop and direction.
You will hook up ULN2003 and the stepper motor in Lab 4.
Using PC4, PC5, PC6, and PC7 as outputs, demonstrate stepping and half-stepping patterns using the potentiometer to set the Maximum speed, and the switches and your ramp code to control the process.Ensure that your logic levels are correct for driving the ULN2003, which inverts the signals. Use the logic analyzer to view your patterns.
Deliverables
Experimenting with the Logic Analyzer
Reading a value from the potentiometer with the ADC
Demonstrate operating code to TA.
Pot should control the counting rate of the 7-segment display
Ramping the counter
Demonstrate operating code to TA.
Turn-in commented C program.
Counter should ramp up from zero to full speed, and when reversing, ramp down to zero, then back up in the opposite direction
Stepper Pattern
Demonstrate operating code to TA at the start of Lab 4.
Turn-in commented C program for stepper sequence:
a description of how your code works, how you used the timers and interrupts, and describe your state machine that handles ramping.
The total memory requirements of your system (code, data)
A calculation of the effective utilization of your CPU, in percent of cycles used, not counting busy-waiting instructions.