CSE466 Lab 3

Milestone 1:  Play a tune stored in ROM (continuous loop). Must be demonstrated on 10/18
Milestone 2:  Play music streamed from the PC. Must be demonstrated by 10/25
Lab Report: Due 10/25, see below for what's required.

• Okay -- the rumor was true...you have to ground OUT2 for the DAC to work properly. 

• Demo Lab2...you can't go on unless we see that you have a good sine wave and simple RC filter on the output of your system.

• Remove the resistor pack and treat the DAC as a memory mapped device. This means you should connect \WR signal from the processor to the \WR input to the DAC, and leave the DATA pins and \CS connected as they are. Its okay if your DAC responds to any external address for now. If we add another memory mapped device later, then you may have to add some chip select logic.

• The CSE466 music format won't be finally decided until Friday and I won't have the corresponding MIDI to CSE466 format converter implemented until Saturday at the earliest, and Monday at the latest,  so you should probably start by working on the ISR and how the ISR will communicate with the main routine that is responsible for decoding the music format. Remember to minimize work done by the ISR without leaving out any hard time critical stuff. 

• Here is a list of things you will need to figure out by referring to the C51 compiler accessible from the Keil under the "books" tab.

  • How to specify that a function is an interrupt service routine in C. 

  • How to force the C compiler to create a lookup table in ROM. Hint: don't use a switch statement in C to implement a lookup table! Use an initialized array. Yes...people tried it that way last year.

  • How to refer to a memory mapped device (the DAC) from 

• You are free to use other timer resources for this project. We will be using Timer-2 or Timer-1 for the serial interface to the PC so don't use both of those for the player. I think its quite possible to do it with just timer-0, but you might come up with a better solution using two timers.

Lab Write-up

    1)  Schematic (hand drawn Okay, but must be neat)
    2)  Worst case timing diagram

    2)  Resource analysis

           RAM, ROM, MIPS (In % of cycles used by ISR)

    3)  Your C code
    4)  Brief description of  how it works

 

Check-out

    Your Lab work must be checked out by the instructor or TA before the next Lab.

    Signature: