/*
 * Copyright 1993,1994,1995 Emin Gun Sirer
 * MIPSI - Mips Instruction Set Simulator.
 */
 #include <stdio.h>
 extern int interrupts;
#include "mt_os.h"

char Phys_Memory[PHYS_MEM_SIZE];

extern host_addr mem_address(mem_addr vaddr,c_rw rw) {

    /* have the TLB translate the address */
    mem_addr paddr;
redo:
    paddr = tlb_translate(vaddr, rw);
    
    if (paddr != INVALID) {
        return (host_addr)&(Phys_Memory[paddr]);
    } else {
        /* if we missed in the TLB */
        unsigned long V0,A0,A1,A2,A3,RES;
	unsigned long vpage;
	PTE ptentry;

	/* setup for a trap ---save the registers */
	V0 = R[REG_V0];  A0 = R[REG_A0]; A1 = R[REG_A1]; A2 = R[REG_A2];
	A3 = R[REG_A3];  RES = R[REG_RES];
	/* put in the trap number */
	R[REG_V0]  = MT_ENTRY;    /* to get an MT-OS call */
	R[REG_A0]  = MT_TLB_TRANSLATE_FAULT; /* to pick the TLB fault */
	
	/* compute vpage */
	vpage = GET_PAGE(vaddr);
	
	/* put in the virtual page */
	R[REG_A1]  = vpage;
	
	dosyscall();   /* perform the trap */
	
	/* get the physical page */
	ptentry = R[REG_RES];
	
	/* update the TLB */
	set_tlb_ppage(vpage,ptentry);
	
	/* restore the registers */
	R[REG_V0] = V0;  R[REG_A0] = A0; R[REG_A1] = A1; R[REG_A2] = A2;
	R[REG_A3] = A3;  R[REG_RES] = RES;
	goto redo;  /* try again */
    }

}