Lecture: address spaces

preparation

• read OSPP §8, Address Translation
• read kern/entrypgdir.c again in your JOS (and compare it with xv6’s entrypgdir in main.c)

administrivia

• lab 2 is out
• read through lab 2 before this week’s sections

kernel-user split

• x86 support: kernel/user mode flag (ring)
  • CPL (current privilege level): lower 2 bits of %cs
    • 0: kernel, privileged
    • 3: user, unprivileged
    • most OSes don’t use 1 or 2
  • kernel can run privileged instructions
    • examples: change the address translation map, talk to I/O devices
    • including changing CPL
  • user processes are unprivileged
• how do unprivileged processes work
  • they cannot directly access files, network, etc.
  • the kernel can
  • can they simply jump into the kernel? no - CPL protection
  • system calls: controlled transfer
    • user → kernel: int instruction sets CPL to 0
    • kernel → user: iret instruction sets CPL to 3
    • newer OSes use syscall/sysret instructions for syscalls on x86-64
• what to put below/above the system call interface: a comparison
  • monolithic kernel
    • big kernel (including file systems, network, etc.)
    • easy to develop applications
    • hard to isolate kernel components
  • microkernel
    • kernel + user-space servers (e.g., file system, network)
    • applications talk to servers via IPCs
    • performance issues: IPCs may be slow
  • exokernel (like JOS)
    • end-to-end arguments
    • kernel: expose low-level abstractions to applications
    • applications can often do a better job
    • library OS
  • most real-world kernels are mixed: Linux, macOS, Windows
  • debate: example

overview

• review virtual memory from CSE 351
• virtual addresses
  • popular in modern OSes: not just for isolation; more examples next week
  • both kernel and user space are virtual addresses
  • again, even pointers in kernel are not using physical addresses
• MMU (memory management unit)
  • hardware support: VA → PA translation [ draw the workflow - CPU/ ]
  • how to make VA → PA lookup faster
    • cache: TLB (translation lookaside buffer)
    • increase page size
  • segmentation vs. paging
• paging
  • page: fixed-size memory chunk (e.g., 4KB/2MB/4MB on x86)
  • page table: address translation map
  • entry: physical address, plus flags
    • P/W/U: present/writable/user
    • A/D: accessed/dirty
    • see xv6’s mmu.h
  • isolation
    • per-process page table: switch with process
    • kernel (un)sets W, etc.
• x86 control registers
  • CR0: turn on paging
  • CR2: will use it later for page faults
  • CR3: pointer to page table (physical address)

x86 two-level paging

• VA → PA translation
  • linear address
    • bits 31-22: page directory index
    • bits 21-12: page table index
    • bits 11-0: offset into 4K page
  • page directory entry (PDE)
    • bits 31-12: page table address
    • bits 11-0: flags
  • page table entry (PTE)
    • bits 31-12: physical 4K page address
    • bits 11-0: flags