Lecture 7: Interrupts and exceptions

Preparation

• Review OSPP §2, The Kernel Abstraction. Focus on 2.3–2.6 this time.

Virtual memory exercise recap

• Last Friday: lazy allocation
  • user space: access unmapped memory
  • page fault occurs: pause execution
  • user → kernel transition - what to save
  • kernel: allocate a page on demand
  • kernel → user transition - what to restore
  • user space: resume execution
  • see “challenges” for other security issues
• isolation
  • xv6: how do we get to trap()? where is struct trapframe from?
    • alltraps in trapasm.S
      • vector0, …, vector255 in vectors.S
  • is it okay to let user space set up the page table?
  • protected control transfers
    • CPL: low 2 bits of %cs register
    • CPL 0 (kernel): can ?
    • CPL 3 (user): can ?
  • do the exercise before Friday

Overview

• kernel: boot up & start a user process (e.g., init) and more
  • when do we need the kernel again? list cases
  • the “event” loop
    • CPU: execute an instruction
    • check for interrupts
    • if yes, run interrupt handler
    • resume
• user → kernel sources
  • exceptions: page fault, div by zero
  • device interrupts: timer, I/O
  • software interrupts: system calls (int instruction)
• x86: 256 interrupt vectors: each interrupt has a number 0–255
  • 0–31: processor interrupts
    • reserved by Intel
    • examples: 0 (division by zero), 14 (page fault)
  • 32–255: kernel configured
    • xv6 & JOS: 32–47 (IRQs)
    • xv6 examples: 32 (timer), 64 (syscall),
    • JOS examples: 32 (timer), 48 (syscall)
  • terminology: interrupts, exceptions, traps, faults, aborts
• run the following div.c on xv6 and trigger division by zero

#include "types.h"
#include "user.h"

int
main(int argc, char **argv)
{
  int x, y, z;

  if (argc < 3){
    printf(2, "usage: div x y\n");
    exit();
  }
  x = atoi(argv[1]);
  y = atoi(argv[2]);
  z  = x / y;
  printf(1, "%d / %d = %d\n", x, y, z);
  exit();
}

x86 interrupt handling

• Interrupt Descriptor Table (IDT): find the interrupt handler
  • %idtr register: base address of IDT
  • IDT entries: gate descriptors, indexed by interrupt numbers
    • cs:offset: entry point
    • DPL
      • 0: exception and device interrupts
      • 3 - software interrupts
    • type
      • interrupt gate: clear IF of %eflags
      • trap gate: don’t change %eflags
  • xv6
    • trap.c: tvinit() - SETGATE, idtinit() - lidt
    • vectors.S: can we use one entry instead of 256 entries?
    • gdb
      • b idtinit
      • p/x idt[0]
      • pretty print: source gdbutil & printdesc idt[0]
• Task State Segment (TSS): stack switch
  • kernel → user: switch to kernel stack (no need for kernel → kernel)
  • CPU: push data to stack
  • xv6
    • vm.c: switchuvm() - ss0 and esp0
• example: div
  • open div.asm and find the idivl instruction (e.g., at 0x62)
  • set a breakpoint at idivl (e.g., b *0x62)
  • run div 1 0 in xv6 shell
  • info registers: esp. cs & esp
  • single step: si
  • check registers again: in kernel now!
  • x/6x $esp
  • run to trap(): who set tf->trapno
• is it possible to change division by zero to return 0 (or 42 if you want)?
  • decide where to return to in user space
  • add case T_DIVIDE: return; and single-step until iret
  • back to user space: re-execute: idivl
  • trap to kernel again