Lecture 4: Virtual memory

Preparation

Download the source code of xv6.

git clone https://github.com/xiw/xv6.git

You should be able to build and run xv6 using make qemu or make qemu-nox, using the same tools for JOS.

Let’s do a quick exercise to get familiar with xv6. Recall that last week we used strace to observe the arguments and return values of Linux system calls. Modify xv6 to print out similar information (hint: syscall() in syscall.c). For example, you should see the following after booting:

...
fork() = 2
exec() = 0
open("console", 0x2) = 3
close(3) = 0
$write(2, "$", 1) = 1
 write(2, " ", 1) = 1

This is init forking and execing sh, sh making sure only two file descriptors are open, and sh writing the $ prompt.

Questions

• how’s lab 1? start lab 2 now!
• why JOS maps two 4-MB ranges during booting
  • will move kernel to high memory and leave low memory for user space
  • make sure you understand exercise 8, lab 1
  • writes to [0, 4M) will cause a page fault; writes to the other won’t - why
• why not just a 4K single-level page table
  • save space: on-demand allocation of the 2nd-level (page table pages)
  • think about x86_64: 4K four-level paging
• why JOS detects 128MB physical RAM - by default QEMU emulates 128MB mem
• what if kernel accesses a physical address larger than RAM size

Paging recap

• pointers: virtual addresses
  • now you understand what happens when you dereference a pointer, access an object field, etc.
  • kernel: set up a page table
  • MMU: VA → PA translation & permission checking
  • TLB: cache translation results
• x86 page table example: 4KB page size, two-level tree
  • see the xv6 book, Figure 2-1, x86 page table hardware
  • top-level: page directory
    • 1024 entries (PDE)
    • each PDE is 32-bit: address of page table page (20 bits) & flags (12 bits)
  • second-level: page table pages
    • each has 1024 entries (PTE)
    • each PTE is 32-bit: physical page address (20 bits) & flags (12 bits)
  • questions
    • would the physical RAM size affect the size of the page directory
    • how would you implement our QEMU’s info pg in JOS kernel monitor
• x86 programming interface
  • CR0: enable/disable paging
  • CR3: the address of the page directory
  • invlpg: invalidate TLB
  • TLB shootdown (multiprocessor)
  • page fault (address in CR2)

Memory management overview in JOS

• bootloader
  • get e820 map from BIOS: boot/entry.S
  • pass e820 map to the kernel: boot/main.c
• kernel
  • save a copy of e820 map: kern/e820.c
  • detect RAM size: detect_memory() in kern/pmap.c
  • track page info
    • use e820 map to identify usable/reserved pages
    • be careful with e820 map
      • ranges may overlap
      • ranges may have holes
      • ranges may not be page-aligned
  • page table management
    • lookup, insert, remove, etc.
    • inc/mmu.h has useful macros
• see inc/memlayout.h