- 9.7
Why are page sizes powers of two?
So you can compute the page number and offset
using just shift and mask operations
- 9.9
Why can't a process access memory it does not own? How could the operating
system allow access to other memory? Why should it or should it not?
Because every address a process uses is translated
by its page table, so it can't "utter" address in another process. The
operating system could allow it access by:
1.
Setting up entries for the physical pages use by other
processes in its page table
2.
Providing a system call for reading/writing from other
processes
This is probably a good idea - it allows
cooperating processes to communicate very quickly and cheaply.
- 9.11
What is the effect of allowing two entries in a page table to point to the
same page frame in memory? Explain how you could use this to copy memory.
What is the effect of updating a byte in one page?
The effect is that two pages in a
single process refer to the same physical page. Hence, if you change a
byte at one address, a byte at the same offset in the other page will
change. This can be used to perform copies quickly by mapping a page read-only at two addresses. If it
is modified, then the copy can be done later (if at all).
4.
9.14 Explain why it is easier to share a reentrant module
using segmentation than it is to do so when pure paging is used
With segmentation, you only need a small
amount of information - the segment descriptor - to share, instead of changing
protection on a large number of pages. In addition, you don't have to worry
about mapping the code to the same address - the addresses within the code are
relative to the segment, so it can be relocated more easily.
5.
9.17 Consider the Intel address-translation scheme shown in
figure 9.21
·
Describe all the steps taken to translate a virtual
address to a physical address
The address is split into a segment
descriptor and an offset. The descriptor indexes into the segment table (either
global or local), which produces an address that is added to the offset to
produce the linear address. This linear address is translated in a two level
page table - the top 10 bits in the page global directory, and the middle 10
bits in the page table, which produces a physical page number that is added to
the lower 12 bits of the address to produce the physical address.
·
What are the advantages to the OS of hardware that
provides such complex memory-translation hardware?
The advantage is that the OS can provide
protection both through segmentation and paging - it doesn't have to choose
just one.
·
Are there any disadvantages? If so, what? If not,
why doesn't everybody do it?
The complexity makes it slow and inflexible - OS's can't choose a page table
format or handle TLB misses. The OS had to be more complex to manage both
segments and page tables.
- 10.2
Given m frames, p references, n distinct page numbers
- What
is the lower bound on the number of page faults
n - these are compulsory misses.
This could occur if page replacement is perfect, or there is more memory
than needed (m > n)
- What
is the upper bound on the number of page faults
p - you could potentially miss on
every page. This could occur if there is very little memory (m = 1) or if
page replacement is particularly bad.
- 10.3
Explain how the system establishes the physical location of a virtual
address in the given computer system. Distinguish between hardware and
software operations
The
virtual address in binary form is
0001 0001 0001 0010 0011 0100 0101 0110
Since the page size is 212, the page table size is 220.
Therefore the low-order 12 bits "0100
0101 0110" are used as the displacement into the page, while the remaining
20 bits "0001
0001 0001 0010 0011" are used as the displacement in the page table. This
displacement is looked up in hardware in the TLB. If there is a miss in
the TLB, than either the hardware may walk the page table for the entry,
or it may raise an exception, and the operating system can check the page
table.
If the entry in the page table is valid, then either hardware or the OS
puts it in the TLB and the process continues executing.
If the entry is invalid, the OS decides what to do next - either signal
the process that it accessed an invalid address, or bring in the page from
somewhere else. If it brings in the page, it must find a free frame (which
may cause paging out another page), and then read in the missing page from
the disk. Once the page is in, the OS marks the page table entry as valid,
possibly sticks the entry in the TLB, and lets the process continue.
- 10.7
List the costs and benefits of virtual memory. What measures can you take
to ensure the costs don't exceed the benefits?
The costs
are additional hardware, additional complexity in the OS, additional
memory usage for virtual memory data structures, and slower access time.
The benefits are good utilization of memory, protection, and larger
logical address space than physical address space.
You can make sure for that programs that fit in memory, there are no
unnecessary overheads - e.g. extra accesses to memory, page faults. Also,
you can use good page replacement algorithms, to minimize the number of
page faults.