Blake Norrish
Chris Good
CSE451 Notes for 5/14

Mondays Point: Make the common case fast
Today's Point: There were two points of the lecture-
	1.  Programs are a series of memory accesses, so we need to always minimize the time to access memory.
	2.  Laziness is needed to efficiently utilize resources, because many times tomorrow never comes.

EA = Effective Access Time; The effective time it takes to access main memory. Important 
	because a running program in really just a series of memory accesses.
Execution Time = EA * Number of Accesses
Number of Accesses = Number of instructions * (about) 1.5, where 1.5 is just an average 
	number for the amount of memory references per instruction.

EA is really just a function of the miss rate; F(Pm) (Pm = Physical Miss)

Techniques For reducing memory access time in the case of a TLB hit

1) Notice the seriality of the system
	CPU -> TLB -> cache -> Physical Memory
   So make it parallel; Do the TLB lookup in parallel with the cache lookup.  To do this we 
	need to store virtual addresses in the cache.
	CPU -> TLB -> Physical Memory
	    -> VAC ->
   VAC = Virtually addressed cache
   TLB = Translation Look-aside Buffer
   Drawback: Because VAC uses virtual addresses, it must be purged on a context switch
	     (or bits added to hold the PID)

2) Only use Offset bits of virtual address to index into the cache
   Drawbacks: Bits from cache must be compared to the Page bits in the virtual address to make 
	sure the cache bits are valid.  Can't have cache with a single associatively larger 
	than the size of the page.  Because the offset bits are what is used to index into the
	cache, we can never have to addresses with the same offset in the cache at the same time.

	EX) Virtual address 1101  11 = Page Number 01 = Offset
		Use 01 to index into the cache, at location 01 will be stored both the physical 
		frame number of the page in physical memory and the Page number that the frame
		number is associated with.  We need to compare the page number from the cache 
		with the page number from the original virtual address.  If they are equal, we
		know that the frame number from the cache is valid. 

A Technique that was used to try to reduce memory required to hold pagetables:

    Memory Needed: 
	Bits Per Entry * (sizeof(Virtual Address) / sizeof(Physical Mem)) * number of pagetables.
    Observation: We really only need as many page table entries as is necessary to cover physical 
	frames.
    Solution: Store PTE's in a hash table.  Hash on the virtual address, look up physical address 
	in the hash table.
    Problem: Collisions; We need to create a linked list to handle collisions, the overhead of 
		this (such as storing next pointers) will increase our memory use 
    Conclusion: TLB Miss takes same amount of time using this method as not using this method.
	Using the hash table is not necessarily smaller because you still need to hold the 
	locations of the pages that are not in physical memory somewhere (in memory).  Thus, 
	this method is no longer used. 

Why are we lazy?
    1) To procrastinate
    2) To be efficient

	Efficient: Not allocate resources now so that we can prioritize and only allocate the 
		resources that we need. Ex) If I complete a task due in a week at the expense 
		of a task due tomorrow, and then am unable to finish the task due tomorrow, 
		obviously I have not prioritized correctly.  It would have been better to be lazy
		with the task due in a week.
	Procrastinate: Not allocate the resources now in hopes that we will never have to.
	
	If I'm going to be lazy, I'm going to do it in such a way to where it will take maximal 
	time to get found out.  Hopefully, I will never get found out and will end up a hero.

Examples of the OS being lazy

Demand Paging - Bring to memory only when we actually need to use them
    Disadvantage: More memory misses
	Because pages are moved into memory individually only when they are needed, a miss will
	occur for every page allocated.  In a non demand paging system the first miss (or allocation)
	will bring all pages into memory, preventing additional misses in the future.

    P = malloc(1GB)
	OS: "Hahahahah", then just writes down that the program wants 1GB
    THen, only when the CPU sees an instruction like p[0] = 1 is memory actually allocated, PTEs 
	written to and mappings established

    Exec("1GB exe")
	OS: "Hahahah", 
    Sets up page table entries with all valid bits set to 0.  Only as each page is needed in 
	the one GB exe will that specific page actually be brought in.  Typically in these cases, we do 
	not need everything loaded into memory.  In the example of Office, there is much 
	functionality in the application, and the only bits that need to be in memory are those 
	responsible for the functionality currently be exercised by the user.  All that other 
	'stuff' doesn't need to be loaded into memory until the appropriate functionality is 
	needed.

Page Replacement
    Which physical pages should be selected to swap out?
	1) Pages not being used now
	2) Pages not being used in the future
	3) Pages that won't be used for the longest time in the future
	4) pages that will never be used

	Optimally, the OS would want to replace the pages that fall into category 4.  Unfortunatly, 
	it is impossible for the OS to know what pages will never be used.  Thus, it guesses wich 
	won't be used for the longest time (category) usually by looking at the past page use history.
	(Least Recently Used)