Out: Friday, 14 January
Due: Friday, 21 January
Turnin: Gradescope
This is a "paper and pencil" assignment about data and instruction representation. Turn-in is online, preferably as a pdf file.
.text addi x10, x10, 21 andi x11, x10, 6 xor x12, x10, x11 lw x13, X(x0) slli x14, x13, 1 and x14, x14, x13 done: .data X: .word 49
You may find the RISC-V resources referenced in the course documentation page to be useful.
NOTE: The actual RISC-V lw instruction
differs from the one described in class and implemented by the simulator. For this question, assume that addresses in the .data
section start at 0, and that the effective address generated by a lw is the address (index) of a word in the data section, exactly as it works in our simulator.
.text addi x10, x10, 21 # 0x01550513 andi x11, x10, 6 # 0x00657593 xor x12, x10, x11 # 0x00b54633 lw x13, X(x0) # 0x00002683 slli x14, x13, 1 # 0x00169713 and x14, x14, x13 # 0x00d77733 done: .data X: .word 49
x13: 0x00000031
x14: 0x00000020
fd010113 addi x2,x2,-48 02112623 sw x1,44(x2)
add x10,x11,x12 slti x13, x12, 0 slt x14, x10, x11 bne x13, x14, skip ... skip:What is the purpose of the three instructions that follow the add instruction?
The code is testing for signed integer overflow. If it branches to label skip then overflow occurred, otherwise not. (Parasphrasing the code, it says if the value in x12 is less than 0, then the result should be less than the value of the other operand, x11. If the value of x12 is greater than or equal to 0 then the result should be greater than or equal to operand x11.)
slli x4,x3,29 # get rid of all but lowest 3 bits
beq x4,x0,done # is value now zero?
addi x4,x0,1 # if not, not a multiple of 8
done: