CSE 378 Homework 7

CSE 378 Homework 7

Due: Monday November 23 in class

Turn in for this assignment should be done with a hard copy brought to class, not using electronic turnin.

It's time to put down your assemblers, and pick up your pencils again. You won't need to write any code for this assignment. Instead, you will be analyzing the impact data and control hazards can have on the speed of a processor. You are to analyze the piece of code found here. Determine the CPI that will be experienced by the machine on this piece of code given each of the following inputs:

Assume we have the five stage pipelined processor that we have seen in class. On a branch instruction, assume that the PC is written in the Mem stage when the decision is known, so if you wait until the branch is resolved to fetch the next instruction, you will be ready to do the fetch in the WB stage of the branch instruction. The target address of a branch is determined during the ID phase, so if you assume that a branch is always taken, you will be ready to fetch the target instruction during the EX phase of the branch.

You are to determine CPI on the machine under each of the following sets of assumptions:

Make sure that you show your work for the above calculations! This should include a trace of the program through the pipeline. (This should sound familiar to those of you who went to the last quiz section.)

Now look at your own code for homework 4, the calculator. For your code, would it be more efficient to assume that branches are always taken or always not taken given the following input:

> 5738 + 3
> q

In answering this question, you are to show the behavior of each branch. Do you think that this answer generalizes to the average case for all possible inputs? Why or why not?

NOTE: If you did not hand in the calculator, please email Maria about getting code to use for the second part of this assignment.