Supplement to the hw5 main assignment.

The Memory Mapped Portion of the Achitecture

You're about to see documentation on the memory mapping scheme used in this architecture. Keep in mind that (a) this is already largely built for you, and (b) you don't really require all this detail to finish the assignment. The architecture does affect the part of the hardware you're building, but only in ways much simpler than all this detail implies. The detail is here largely for completeness, but also because some of it may be useful if you write the code for the optional (last) part of this assignment, and all of it is useful if you need to read and understand the code we're providing.

So, don't despair, it's a lot easier than it probably will look. The hard part is understanding what all the pieces are trying to do, and how they fit together.

The IO Architecture

The machine has memory mapped locations that directly expose the hardware character controller and block controller devices.

Name	Address	Use
Character Controller	0x40000000	When written, the data is fed into the character controller. When read, the result is the current output of character controller.

Name	Address	Use
Block Ctrl	0x40000010	When written, writes the block controller Ctrl input. When read, reads the controller's current output (Status port).
Block Memory Address	0x40000014	Write-only. Writes the block controller's memory address input.
Block Disk Address	0x40000018	Write-only. Writes the block controller's disk address input.
Block Count	0x4000001c	Write-only. Writes the block controller's block count input.

The Memory Protection Architecture

Memory protection is provided using memory base and length registers. When the machine is running in unprivileged mode, the contents of the base register is added to all addresses before actually reading from memory. (This means, for instance, that the instruction fetched is at physical (actual) memory location PC+base.) This allows a program that has been linked as if it were going to be loaded at address 0 to be loaded anywhere in memory without change.

The length register is used to constrain the portion of memory an application can touch. If the address it issues (before adding base) is greater than or equal to length, it is a memory addressing error. In this case, an exception is raised.

When the machine is operating in privileged mode, the base and length registers are ignored. (This allows the operating system full access to memory.)

Note that because all memory mapped resources are at addresses that will be larger than any application's base+length register settings, no application will be able to manipulate those resources itself. This is an aspect of enforcing security.

Name	Address	Use
Memory Base Register	0x40000020	Offset to add to all memory addresses when machine is running in unprivileged mode.
Memory Length Register	0x40000024	Largest legal address that can be requested by the program when the machine is running in unprivileged mode.
Memory Size	0x40000028	Read-only. The size of physical memory, in bytes.

The Trap Architecture

The machine has four memory mapped locations related to trap handling:

Name	Address	Use
Handler Address	0x40000030	Holds the address that should be loaded into the PC when an interrupt, exception, or trap occurs.
Status Register	0x40000034	Bit 0 is the privilege bit. When on, the machine operates in privileged mode. (When off, it does not.) Bit 1 is the interrupt enable bit. When 1, interrupts (and exceptions, traps, or whatever other name you might use) can occur. When 0, they are not raised.
EPC	0x40000038	PC of the instruction executing when the trap occurred.
Cause	0x4000003c	Read-only. An integer indicating the kind of trap that occurred.

(Note that "read-only" refers to what can be done by software. The hardware can of course do most anything.)