Midterm 2 Q&A

To submit a question, send mail to zahorjan@cs.washington.edu.

1. [Regarding Question 2] The meaning of this question is rather confusing. It reads:

   "The Z and V condition code bits have values copied from the output of the ALU when the subtraction occurs. The N bit is a copy of the highest order bit of the result of the subtraction."

   Does this mean that Z and V are nothing more than copies of the result of the subtraction?

   The ALU has multiple outputs. One is the (32-bit) result of the operation. Others are single bits, in particular, a bit that is 1 iff the 32-bit result is zero, and a bit that is one iff overflow has occurred in computing the 32-bit result. Only the N condition code bit comes from the 32-bit ALU result - it is a copy of the high order bit.

2. Does the 'S' predicate thingy apply to the LD, ST, B or BAL instructions? They don't seem to make sense to me in these cases, but I couldn't find anything in the text besides "Any instruction can set the condition bits."

   No, it doesn't apply to them.

3. How much detail do we need to provide when we are describing the control of our multicycle implementation? I have read the book's section, and they provide the values for the control lines and such for each of the stages. Do we need to provide this much detail, or can we just explain what will be going on in each cycle?

   Just what is going on in each cycle.