CSE 378 Homework #6: Branch Prediction, Scoreboarding, Caching, VM

Due: Thursday, 3/9/2006 - Not Turned in

Assignment Goals

These excercises were chosen to help you understand the final topics of the course, in preparation for the final exam. You will have a chance to discuss solutions during Sections on 3/9.

Exercises

1. From the text: 6.36 (branch prediction), 7.4 (locality), 7.9 (caching), 7.29 (cache organization), 7.39 (virtual memory), 7.40 (TLB's)
2. Scoreboarding handles WAW dependences by refusing to issue more than one instruction writing any single register. However, instructions involved in both WAR and RAW dependences may be issued. It is critical that instructions writing registers involved in WAR dependences delay until the read is complete, and that instructions writing registers involved in RAW write before the read. Explain how the scoreboarding technique manages to distinguish these two cases. It may help to consider a specific example:

       MUL.D    F0, F6, F4
       DSUB.D   F8, F0, F2
       ADD.D    F2, F10, F2