Machine Organization and Assembly
Language Programming
Tentative Outline (subject to change) -- Autumn 2004
- Introduction
to architecture and organization (Chapter 1)
- Signed and
unsigned numbers (Chapter 4. Sections 4.1 to 4.3). Review done in
sections.
- Instruction
set and assembly language (Chapter 3)
- General
computer structure
- Memory
structures: registers, information units, addressing
- CPU:
instructions
- An example
architecture: The MIPS 2000 (Chapter 3 and Appendix A)
- Introduction
to SPIM
- Overview
of MIPS: registers, data types, addressing.
- Arithmetic-logic
instructions;
- Load
and store instructions; branches
- Instruction
encoding; addressing revisited.
- Procedures
and stacks (Chapter 3)
- RISC vs.
CISC (Appendix E)
- Performance
metrics (Chapter 2)
- Processor
implementation. Single cycle implementation (Chapter 5)
- Data
path.
- Multiple
cycle implementation. Control.
- Processor
implementation. Pipelining (Chapter 6)
- Data
path
- Data
hazards. Forwarding
- Control
hazards.
- Memory
Hierarchy. Caches (Chapter 7)
- Cache
organization. Parameters
- Cache
write policies
- Memory
Hierarchy. Virtual Memory (Chapter 7)
- Multiprogramming
- Paging
- Virtual
address translation: page tables and TLB's
- Input-Output
(Chapter 8)
- I/O
architecture. Buses.
- I/O
devices.
- I/O
control
- One or more
of the following topics
- EPIC
(or VLIW) ISA -- Itanium.
- Networks
- Floating-point.
Arithmetic and functional units (Chapter 4)
- Parallel
computers (Chapter 9)