R0 = 0x80 (address of start address) R0 = memory[R0] (current address) R1 = 0x84 (address of number of words) R1 = memory[R1] (number of words) R2 = 0x0 (constant 0) R3 = 0x4 (constant 4) R4 = 0x0 (number of words written to) R5 = 0x1 (constant 1) store R2 in memory[R0] R0 = R0 + R3 R4 = R4 + R5 if (R4 != R1) branch to the store instruction (address 0x20)
IMM R0, 0x80 LOAD R0, R0 IMM R1, 0x84 LOAD R1, R1 IMM R2, 0x0 IMM R3, 0x4 IMM R4, 0x0 IMM R5, 0x1 STORE R0, R2 ADD R0, R0, R3 ADD R4, R4, R5 BNE 0x20, R4, R1
Operation | Opcode | Meaning of other bytes | ||
---|---|---|---|---|
ADD | 0x20 | Dest. reg. | Reg. 1 | Reg. 2 |
IMM | 0x60 | Dest. reg. | Unused | Value |
BNE | 0x11 | Dest. address | Reg. 1 | Reg. 2 |
LOAD | 0xA4 | Dest. reg. | Reg. with address | Unused |
STORE | 0x08 | Unused | Reg. with dest. address | Source reg. |
0x 60 00 00 80 0x A4 00 00 00 0x 60 01 00 84 0x A4 01 01 00 0x 60 02 00 00 0x 60 03 00 04 0x 60 04 00 00 0x 60 05 00 01 0x 08 00 00 02 0x 20 00 00 03 0x 20 04 04 05 0x 11 20 04 01
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