TLB Miss Means Either ...
The page is present ==> only a TLB entry must be created
The page is not present (i.e. page table entry for the virtual address has 0 valid bit), a page fault exception is signaled
- The exception flushed the instruction, put the PC in the exception program counter (EPC) and interrupted the processor.
- The operating system, checking the cause, discovers a page fault was signaled, and knowing this is a time consuming operation, saves the state: GP and FP registers, Page Table Address, EPC & Cause.
- What address is needed:
- Instruction Page Fault, find address in EPC.
- Data Page Fault, compute address from Inst.
- OS then:
- Finds disk address in page table entry.
- Chooses victim to replace; writes back if dirty bit set.
- Initiates read of disk block.