The final exam will be the size of two to three quizzes. One quiz will cover the material that would have been on Quiz #5, i.e., material from the last three weeks of the course. The rest of the exam will be review material from the entire course.

[As of 3/16/99 11:45am]

Number systems: binary (incl. 1's, 2's and signed-magnitude negatives), hex, decimal.

Logic gates: truth tables and schematic symbols

Boolean algebra: know all of the basic identities. You will not have to do complicated reductions or proofs.

K-maps: 3 and 4 variable maps. Simplification from K-maps (SOP and POS).

Combinational design: English description -> input/output encoding -> truth table -> K-map -> Boolean equation -> schematic.

Arithmetic circuits: half-, full-adders and schemes for larger designs. ALU design concepts.

Schematics: equations <-> schematic diagrams; timing waveforms. Use of DesignWorks.

Switching circuits: multiplexers, decoders, PLA, PALs, ROMs. Properties and notation. Use to implement combinational circuits.

Latches and flipflops: definitions, behavior, timing, use.

Clocks and timing concepts.

Verilog basics: modules, ports; continuous vs. procedural statements; language elements

Registers.

State machines: states, transitions, outputs, Moore vs. Mealy.

Sequential circuit design. Counters. General procedures for sequential design.

Computer organization: principal parts of the CPU (IC, MAR, MBR, ALU, regs. etc), their typical interconnections. Control path vs. data path. Fetch-execute cycle. State machines for instruction execution.

Parts books: understanding and using commercial data sheets.

Electronics: transistor basics, especially CMOS; use in digital circuits. RAM: SRAM vs DRAM.