Example: Traffic Light Controller (cont’d)
initial begin state = `highwaygreen; ST = 0; end always @(posedge Clk) begin if (reset) begin state = `highwaygreen; ST = 1; end else begin ST = 0; case (state) `highwaygreen: if (TL & C) begin state = `highwayyellow; ST = 1; end `highwayyellow: if (TS) begin state = `farmroadgreen; ST = 1; end `farmroadgreen: if (TL | !C) begin state = `farmroadyellow; ST = 1; end `farmroadyellow: if (TS) begin state = `highwaygreen; ST = 1; end endcase end end endmodule
case statement triggerred by clock edge