Register-transfer-level description

• Control

  • transfer data between registers by asserting appropriate control signals

• Register transfer notation - work from register to register

  • instruction fetch: mabus ? PC; – move PC to memory address bus (PCmaEN, ALUmaEN) memory read; – assert memory read signal (mr, RegBmdEN) IR ? memory; – load IR from memory data bus (IRld) op ? add – send PC into A input, 1 into B input, add (srcA, srcB0, scrB1, op) PC ? ALUout – load result of incrementing in ALU into PC (PCld, PCsel)
  • instruction decode: IR to controller values of A and B read from register file (rs, rt)
  • instruction execution: op ? add – send regA into A input, regB into B input, add (srcA, srcB0, scrB1, op) rd ? ALUout – store result of add into destination register (regWrite, wrDataSel, wrRegSel)

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