CSE 370 Solution Set #4
Spring 1999
Total Points 20
1) 0 Points:
c. Here's a possible schematic using only NOR gates:
2) 1 Point:
a. Since AND-OR-Invert gates have inverted output we'll want to
find the function's complement in SOP form.
Recall that the 3 input XOR function returns true
when an odd # of inputs are 1. So the complement returns true when an even # of inputs are
1.
F' | A'B' | A'B | AB | AB' |
C' | 1 | 0 | 1 | 0 |
C | 0 | 1 | 0 | 1 |
Here's the corresponding schematic:
3) 1 Point:
e. F = ACE + ACF + ADE + ADF + BCE + BCF + BDE + BDF
A(CE + CF +
DE + DF) + B(CE + CF + DE + DF)
(A + B)(CE
+ CF + DE + DF)
(A + B)(
C(E + F) + D(E + F) )
(A + B)( (C
+ D)(E + F) )
(A + B)(C +
D)(E + F)
4) 3 Points:
3.13 with XOR delays 3x NAND delays, the waveform should have similar
shape to the following:
5) 3 Points:
Here's the schematics for F, F2, & F3:
The timing waveforms should look like the ones in the Katz text.
6) 4 Points:
Here's the truth table remembering that AB is a 2-bit number multiplied
by CD resulting in the 4-bit answer WXYZ:
A | B | C | D | | | W | X | Y | Z | |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0*0=0 | |
0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0*1=0 | |
0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0*2=0 | |
0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0*3=0 | |
0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1*0=0 | |
0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1*1=1 | |
0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1*2=2 | |
0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1*3=3 | |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2*0=0 | |
1 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 2*1=2 | |
1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 2*2=4 | |
1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 2*3=6 | |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3*0=0 | |
1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 3*1=3 | |
1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 3*2=6 | |
1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 3*3=9 |
Implementing with 4 16:1 muxes you simply use 1 mux for
each output, WXY&Z, from the truth table, the inputs to the mux are the 16 rows of the
table and the select bits are ABCD.
To implement with 4 8:1 muxes you have to use D & D' as additional
inputs to the muxes and use ABC as the select bits:
7) 5 Points total:
Start with the truth table for the function:
A | B | C | D | | | F |
0 | 0 | 0 | 0 | 1 | |
0 | 0 | 0 | 1 | 0 | |
0 | 0 | 1 | 0 | 0 | |
0 | 0 | 1 | 1 | 1 | |
0 | 1 | 0 | 0 | 0 | |
0 | 1 | 0 | 1 | 1 | |
0 | 1 | 1 | 0 | 0 | |
0 | 1 | 1 | 1 | 1 | |
1 | 0 | 0 | 0 | 0 | |
1 | 0 | 0 | 1 | 0 | |
1 | 0 | 1 | 0 | 0 | |
1 | 0 | 1 | 1 | 1 | |
1 | 1 | 0 | 0 | 1 | |
1 | 1 | 0 | 1 | 1 | |
1 | 1 | 1 | 0 | 0 | |
1 | 1 | 1 | 1 | 1 |
a. (1 point) Implement with a 16:1 Mux:
b. (1 point) Implement with an 8:1 Mux:
c. (1 point) Implement with a 4:1 Mux & gates:
d. (1 point) Implement with a 4:16 decoder & a gate:
e. (1 point) Implement with 2 3:8 decoders & a gate:
Note that typical decoders have inverted
outputs so that you need to invert the outputs before running them all into an OR gate,
which of course is equivalent to a
NAND gate.
8) 3 Points total:
a. Use the 4 bit output from the Bar coder as the select bits to your
decoder...
b. If your favorites change then you simply need to re-wire the inputs
to your OR gates so instead of 1, 5, 6, 9, 12, 15, they are 0, 2, 7, 8, 10, 13.