CSE370 Assignment 2
Distributed: 2 April 1999
Due: 9 April 1999
Reading:

Katz, Chapter 2 (pp. 4085 and 92102).
Exercises:

Katz exercise 2.3 without using inverters (only 2input NAND gates).
Draw the schematic in DesignWorks and verify its operation by exercising
all input combinations using a set of three switches. Turn in the schematic
drawing.

Katz exercise 2.7 (a,b,c,d).

Prove the consensus theorem (xy+yz+x'z = xy+x'z) by two methods:
(a) using a truth table and
(b) using the laws of Boolean algebra.

Katz exercise 2.10 (b, g).

Katz exercise 2.12 (do the verification in DesignWorks using switches).
Turn in the schematic drawing.

Give a Boolean function that cannot be realized using:
(a) only AND and OR gates;
(b) only XOR gates.

Find and simplify the complement of the following functions:
(a) F = x'y'z + x'yz + xyz
(b) G = yz + x(yz' + z)
Turn in DesignWorks schematics for both the functions above and their minimized
complements.

Consider the function f(A, B, C, D) = Sm(0,
1, 2, 5, 6, 8, 10, 14).
(a) Write this as a Boolean expression in canonical minterm form.
(b) Rewrite the expression in canonical maxterm form.
(c) Write the complement of f in "little m" notation and as a canonical
minterm expression.
(d) Write the complement of f in "big M" notation and as a canonical maxterm
expression.

Consider the function f(W, X, Y, Z) = YZ' + W'Y'Z + X'Z'.
(a) Express the function in canonical sumofproducts form. Use "little
m" notation.
(b) Express the complement of the function in canonical productofsums
form. Use "big M" notation.
Rationale:

To practice and gain facility with Boolean algebra and canonical forms.

To start using a logic schematic diagram editor and simulator.
Comments to: cse370webmaster@cs.washington.edu
(Last Update: 04/02/99)