CSE370 Assignment 7
Distributed: Feb. 18, 1998
Due: Feb. 27, 1998
Reading:
Katz: Chapter 6: pp. 289, 299-301, 305-306, 309-312
(Pay attention only to what is said about positive edge-triggered
flip-flops!)
Katz: Chapter 7: pp. 329-344,350
(Ignore everything uses anything besides positive edge-triggered
flip-flops!)
Exercises:
- Using just the basic D flip-flop and combinational logic, design
an 8-bit register with load (clock enable), clear and
output-enable (tristate) control signals. (Use abbreviations
where appropriate.)
- Write an ABEL program to implement the register of problem 1.
Compile this into a block symbol, put it into a schematic and
test it. Turn in everything!
- Using the 8-bit register you designed in problem 1, design a
dual-ported memory with four 8-bit words. This memory has two
ports, one for reading and one for writing. Each port has a
set of data lines and a set of address lines. In addition,
the write port has a WRITE control line that determines
whether or not the memory will load data on the next clock
cycle.
- Write an ABEL program to implement the memory of problem 3, using
the register designed in problem 2. Compile this into a
block symbol, put it into a schematic and test it. Turn
in everything!
- Now design a single-ported memory with four 8-bit words. This
memory has a single port with data lines, address lines and
a R/W signal which indicates whether the memory should be
reading or writing. When R/W is 1, the memory reads the
data at the given address onto the data lines. When R/W is
0, the memory writes the data that the user puts on the data
lines into the given address. Note that when writing, the
memory must tristate the data outputs in order not to fight
with the data being written.
- Design an 8-bit shift register with 3-bits of control (S2,S1,S0)
which define the operation of the shift register as follows:
S=0: Hold (NOP)
S=1: Load input
S=2: Clear
S=3: Complement contents
S=4: Shift right 1
S=5: Rotate right 1
S=6: Shift left 1
S=7: Rotate left 1
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