Computer organization

3-Jun-98


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Table of Contents

Computer organization

Structure of a computer

Registers

Register transfer

Register files

Memories

Instruction sequencing

Instruction types

Elements of the control unit (aka instruction unit)

Instruction execution

Data path (heirarchy)

Data path (ALU)

Data path (ALU + registers)

Data path (bit-slice)

Instruction path

Data path (memory interface)

Block diagram of processor

Block diagram of processor

CSE370 processor data-path and memory

CSE370 processor control

CSE370 processor instructions

Tracing an instruction's execution

Tracing an instruction's execution (cont’d)

Tracing an instruction's execution (cont’d)

Tracing an instruction's execution (cont’d)

Tracing an instruction's execution (cont’d)

Register-transfer-level description

Register-transfer-level description (cont’d)

Review of FSM timing

FSM controller for CPU (skeletal Moore FSM)

FSM controller for CPU (skeletal sync. Mealy FSM)

FSM controller for CPU (reset and inst. fetch)

FSM controller for CPU (decode)

FSM controller for CPU (instruction execution)

FSM controller for CPU (add instruction)

FSM controller for CPU

Author: Gaetano Borriello

Email: cse370-webmaster@cs.washington.edu

Home Page: http://www.cs.washington.edu/education/courses/cse370/Spring98/