PPT Slide

7 – Sequential Logic Examples

© 1996 Gaetano Borriello

Finite string pattern recognizer (step 4)

• ABEL-HDL description including state assignment (or state encoding)

13

MODULE string

interface (clk, X, rst -> Q0..Q2, Z);

TITLE 'string recognizer for 010 and 100'

"Inputs

clk, X, rst pin;

"Outputs

Q0..Q2 pin istype 'reg,buffer';

Z pin istype 'com';

"Aliases for state register and encoding SREG = [Q0..Q2]; S0 = [0,0,0]; "reset state S1 = [0,0,1]; "strings ending in ...0 S2 = [0,1,0]; "strings ending in ...01 S3 = [0,1,1]; "strings ending in ...010 S4 = [1,0,0]; "strings ending in ...1 S5 = [1,0,1]; "strings ending in ...10 S6 = [1,1,0]; "strings ending in ...100

EQUATIONS

 SREG.clk = clk;

SREG.clr = rst;

Z = (SREG.fb == S3);

STATE_DIAGRAM SREG

 state S0: if X then S4 else S1; state S1: if X then S2 else S1; state S2: if X then S4 else S3; state S3: if X then S2 else S6; state S4: if X then S4 else S5; state S5: if X then S2 else S6; state S6: if rst then S0 else S6;

END

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