PPT Slide

4 – Combinational Logic Design Examples

© 1996 Gaetano Borriello

Ripple-carry adders

• Critical delay

  • the propagation of carry from low to high order stages

31

A

A

B

B

Cin

Cout

@0

@0

@0

@0

@N

@1

@1

@N+1

@N+2

late

arriving

signal

two gate delays

to compute Cout

4 stage

adder

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