PPT Slide

3 – Combinational Logic Implementation

© 1996 Gaetano Borriello

PALs and PLAs: design example (cont'd)

• Code converter: NAND gate implementation

  • loss or regularity, harder to understand
  • harder to make changes

52

W

\A

X

\C

Y

Z

B

B

B

B

B

B

\B

\B

C

C

C

C

C

A

A

A

D

D

D

\D

\D

\D

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