PPT Slide
3 – Combinational Logic Implementation
© 1996 Gaetano Borriello
41
0 A'B'C'D'E' 1 2 3 4 5 6 7
S2
3:8 DEC
S1
S0
E
C
D
0 1 2 3 4 5 6 7 ABCDE
S2
3:8 DEC
S1
S0
0 1 2 A'BC'DE' 3 4 5 6 7
S2
3:8 DEC
S1
S0
E
C
D
0 AB'C'D'E' 1 2 3 4 5 6 7 AB'CDE
S2
3:8 DEC
S1
S0
Cascading decoders
5:32 decoder
1x2:4 decoder
4x3:8 decoders
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